In a conventional liquid crystal printer, for example, optical write access of image data is performed by ON/OFF-controlling a large number of microshutters provided to a liquid crystal optical shutter (to be referred to as an LCS hereinafter), thus forming an electrostatic latent image.
In order to perform high-speed optical write access, the LCS is controlled by two-frequency driving, e.g., at low frequency fL and high frequency fH. In order to decrease the numbers of drive elements and wirings, and a mounting area to minitualize the shutter, time-divisional driving is performed.
FIG. 1 is a block diagram showing an LCS drive signal generator for generating drive signals and timing signals to two-frequency drive the LCS, as a related art shown in U.S. Application Ser. No. 769,692 (U.S. Application Ser. No. 45,191). FIG. 2 is a timing chart showing an operation of the LCS drive signal generator, and FIG. 3 is a table showing contents of data DSTATUS stored in ROM 2 (to be described later). The arrangement and operation of the conventional LCS drive signal generator will be described with reference to FIGS. 1 to 3.
Referring to FIG. 1, counter 1 is a modulo-n (n.ltoreq.2.sup.m) counter, and counts 0 to n-1 in synchronism with inverted clock signal .phi. of clock signal .phi. input through inverter 4. Counter 1 outputs block address signal BLADR from output terminals Q0 (LSB) to Qm-1 (MSB) to address input terminals A0 to Am-1 of ROM (Read Only Memory) 2. Block address signal BLADR varies in the range of values 0 to n-1, as shown in FIG. 2, and is cyclically input to ROM 2 within period Tw in response to trailing edges of inverted clock signal .phi. in the order of 0 to n-1. Rom 2 stores data DSTATUS at addresses "0" to "n-1", as shown in FIG. 3. Terminal CE (Chip Enable) and terminal OE (Output Enable) of ROM 2 are grounded, and are always at active (L) level. Therefore, each time block address signal BLADR is input to address input terminals A0 to Am-1, data DSTATUS corresponding to input block address BLADR is output from one of data output terminals D0 to D7 of ROM 2 to corresponding one of data input terminals D0 to D7 of latch 3.
ROM 2 has input terminals Am and Am+1. When a page selection signal is input to input terminals Am and Am+1, one of four pages can be selected. Therefore, different contents of data DSTATUS are stored for each page, so that four combinations (LCS drive signals COM1, COM2, PT1, and PT2, and timing signals DSEL, CK2, and TWSX) of signals can be generated.
Terminal CK of latch 3 receives clock signal .phi.. In synchronism with the leading edge of clock signal .phi., data DSTATUS output from output terminals D0 to D7 of ROM 2 are input to data input terminals D0 to D7, and are held until next clock signal .phi. rises. Data DSTATUS input to latch 3 are output from output terminals Q0 to Q6 as LCS drive signals PT1, PT2, COM1, and COM2, and timing signals DSEL, CK2, and TWSX (FIG. 2). When data DST(n-1) (FIG. 3) is input to latch 3, a reset signal is output from output terminal Q7 of latch 3 to reset terminal R of modulo-n counter 1. Therefore, after modulo-n counter 1 counts from 0 to (n-1) (addresses of ROM 2), it is reset by value "1" of bit "7" of data DST(n-1) output from ROM 2 to latch 3. LCS drive signals COM1, COM2, PT1, and PT2 output from latch 3 are output to an optical write controller (not shown), and are used for two-frequency drive control of the LCS through the controller in the time-divisional manner.
As shown in FIG. 2, in the LCS drive signal generator, n blocks of data stored in ROM 2 are read out within period Tw.
Since a block of data is read out from ROM 2 for each period T.phi. of clock signal .phi., the number n of blocks read out during an interval of period Tw is: EQU n=Tw/T.phi.=2Tw/TfH=2fH.Tw (1.1)
where fH is a frequency of a high frequency used in the two-frequency driving, and is expressed as: EQU fH=1/TfH=1/2T.phi. (FIG. 2).
If Tw=2 ms and recording is performed at a recording density of 240 DPI, recording of nine A4-sized sheets can be performed per minute. However, if fH=300 kHz, the number n of necessary blocks is: EQU n=2.times.300.times.10.sup.3 .times.2.times.10.sup.-3 =1200 (blocks).
Therefore, in order to store 1200 blocks of data DSTATUS, ROM 2 having a capacity of 2m.times.8 (where m satisfying 2.sup.m .gtoreq.1200, i.e., m.gtoreq.11), i.e., 2.sup.11 .times.8=2048.times.8 (bits), must be used. For this reason, if a versatile EPROM, EEPROM, mask ROM, or the like is used as ROM 2 to constitute the LCS drive signal generator, a ROM having a capacity of 2048.times.8 (bits) must be used although a ROM having a capacity of 1200.times.8 (bits) need only be used in practice, resulting in high cost.
Since ROM 2 is additionally mounted, if a large-capacity ROM is used, the number of connecting wirings is increased, and thus, a mounting area is increased.
In the conventional LCS drive signal generator described above, LCS drive waveforms such as LCS drive signals COM1, COM2, PT1, and PT2, timing signals DSEL, CK2, and TWSX, and the like are generated in accordance with data DSTATUS nonrewritably stored in ROM 2. However, operation characteristics of the LCS may be changed due to improvement or modification of a liquid crystal material used in the LCS along with developments of the liquid crystal techniques or modification of specifications. In this case, in a waveform generating apparatus which can only generate fixed LCS drive waveforms in accordance with data DSTATUS stored in ROM 2 like in the conventional LCS drive signal generator, modifications of specifications of LCS drive waveforms along with modifications and improvements of the liquid crystal material cannot be readily performed, and optimal LCS drive waveforms cannot be generated.
FIGS. 4A and 4B show possible combinations of LCS drive signals PT1, PT2, COM1, and COM2 used in time-divisional two-frequency driving of the LCS.
In FIG. 4A, Y1 (PT1) and Y2 (PT2) represent waveforms of voltages applied to signal electrodes of microshutters of the LCS, and Y3 (COM1) and Y4 (COM2) represent waveforms of voltages applied to common electrodes of the LCS. As is known, in a formation region of the microshutters, signal electrodes and common electrodes intersect with each other, and any of combinations of voltage waveforms Y3-Y1, Y3-Y2, Y4-Y1, and Y4-Y2 is applied to each microshutter, as shown in FIG. 4B. Voltage waveform components applied to each microshutter are four components, i.e., high-frequency components fH and *fH and low-frequency components fL and *fL. The microshutters of the LCS are ON/OFF-controlled by the four combinations of the voltage waveform components. Note that *fH is obtained by inverting a phase of fH, and *fL is obtained by inverting a phase of fL.
Since Y1, Y2, Y3, and Y4 can respectively take four types of waveforms fH, *fH, fL, and *fL, the number of combinations of waveforms of Y1 to Y4 is 4.times.4.times.4.times.4=256. However, even if all of Y1 to Y4 are inverted and applied to the microshutters, the effect as drive waveforms is not changed. Therefore, in practice, the number of combinations of waveforms applied to the microshutters of the LCS is 128.
However, all the 128 combinations of drive waveforms of the LCS may not possibly be used, and 20 combinations need only be used, as shown in FIG. 4B. By using 20 combinations, any of voltage waveforms of Y3-Y1, Y3-Y2, Y4-Y1, and Y4-Y2 is applied to the microshutters of the LCS.
However, in the conventional LCS drive signal generator, since LCS drive signals PT1, PT2, COM1, and COM2 are generated in accordance with data DSTATUS nonrewritably stored in ROM 2, when waveforms of LCS drive signal PT1, PT2, COM1, and COM2 must be changed due to modifications or improvement of the liquid crystal material, ROM 2 must be replaced. In order to improve the operation characteristics of the LCS, an LCS panel is warmed up by a light source or the like upon starting the LCS. In this case, it is known that a special high-frequency signal is applied to the LCS upon starting of the LCS, so that the LCS can be warmed up to an optimal operating temperature. The high-frequency signal has a different waveform from those of the LCS drive signals during a printing operation, and cannot be generated by a waveform generating apparatus which can only generate fixed drive waveforms like in the conventional LCS drive signal generator.
Furthermore, data DSTATUS stored in ROM 2 may be changed for some reason. However, since no error check of data is performed, even if an abnormal drive waveform is applied to the LCS and a DC component applied to the LCS within one period is not "0", the abnormal voltage is kept applied to the LCS for a long period of time. As a result, the LCS may cause electrolysis and be broken.